The present invention relates to an electronic circuit for a timepiece using a junction type electric field effect transistor (referred to JFET) which controls a potential barrier against a charge carrier which transits from a source to a drain with a forward voltage toward the gate, and more particularly to a gate construction of an oscillating circuit portion and a frequency dividing circuit portion.
Since an integrated circuit of JFET type recently proposed has a possibility to make a delay-power product thereof smaller than that of an IIL construction, attention is paid to this integrated circuit for the sake of saving timepiece power consumption.